Cathode ray tube display device employing constant velocity beam deflection



March 28, 1967 Filed Oct. 2. 1964 C. P. HALSTED ET AL CATHODE RAY TUBE DISPLAY DEVICE EMPLOYING CONSTANT VELOCITY BEAM DEFLECTION 3 Sheets-Sheet l -Flg./

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CATHODE RAY TUBE DISPLAY DEVICE EMPLOYING CONSTANT VELOCITY BEAM DEFLECTION Flled Oct. 2, 1964 5 Sheets-Sheet 2 6 9 CONTROL SHIFT 24BIT I 602 3 RESGTISIIITTER FUNCTION PULSE AND GENERATOR I GENERATOR v GATE. GII I 606 3B|T TIMIMG 605/ COUNTER COMPARATOR MATRIX 604 INvENToRs.

CHARLEY I HALSTED STANLEY J.SAVINESE DELAY BY GILBERT YANISHEVSKY iq I RESET ATTORNEY United States Patent 3,311,908 CATI-IODE RAY TUBE DISPLAY DEVICE EM- PLOYING CONSTANT VELOCITY BEAM DEFLECTION Charles P. Halsted, Oreland, Stanley J. Savinese, Ridley Park, and Gilbert Yanishevsky, Philadelphia, Pa., assignors to Burroughs Corporation, Detroit, Mich., a

corporation of Michigan Filed Oct. 2, 1964, Ser. No. 400,981 11 'Claims. (Cl. 340-324) This invention relates to symbol generators, and more particularly relates to a system for changing the dimensions of the character displayed by a symbol or character generator.

The use of large capacity digital computers in decisionmaking devices requires a means for displaying information to the operator of the computer rapidly and in the form which can be easily understood. One system for displaying such information presents a graphic symbol on a display screen to the operator, which symbol indicates the desired information. It is formed by a unit in the computer called a character generator or a symbol generator.

One type of character generator receives information from a computer in the form of coded words and selects a symbol in accordance with these coded words for presentation upon a cathode ray tube (CRT) screen. A character generator of this type is described in the application of Charles P. Halsted, Ser. No. 277,796, filed May 3, 1963, entitled, Symbol Generating Apparatus, and assigned to the same assignee as the instant application. In this type of character generator, the characters are stored as indications of a plurality of straight lines, each line being designated by length and polar angle. The character generator moves the electron beam of the CRT to form a series of straight lines Which together compose the desired character.

It is desirable for a character generator to be capable of displaying information to a human operator as fast as possible. The number of individual symbols that may be put on the CRT at any one time is limited by: one, the resolution of the cathode ray tube; two, the speed of the symbol generator; three, the CRT phosphor persistence; and four, the ability of the human operator to single out and concentrate on one symbol when it is among a large quantity of other symbols.

Because of the limitations on the number of symbols, other techniques for increasing the information which is perceived by the human operator are required. One such technique is to vary the size of the characters in accordance with additional information. For example, when a symbol is used to indicate an airplane in flight, information indicating that it is gaining in altitude may be conveyed to the human operator by increasing the size of the symbol in a dynamic manner by causing selected symbols to appear to bloom out at a controlled rate. This does not require an additional symbol and therefore avoids the limitations, discussed above, on the number of symbols which may be perceived by an operator of the character generator. This technique is increased in its capabilities by increasing the range of sizes which a character may have and by increasing the number of the patterns that it may follow in changing its size. That is, not only may information be conveyed by the direction of a change in size or the amount of change in size, but also by a pattern of change in size. The rate of change in size, for example, may be a modulation by a saw-tooth indicating one kind of information or a sine wave indicating another kind of information. Accordingly, it is an object of this invention to provide an improved character generator.

It is a further object of this invention to provide a character generator in which information flow is increased by changing the size of the characters that are to be displayed.

It is a still further object of this invention to provide an improved system which permits the selection of the size of a character and the selection of the manner in which the size of a character will be changed by a character generator without necessitating the storage of different characters for discrete sizes of characters independently.

It is a still further object of this invention to provide a system for changing the size of a character to be displayed by a symbol generator which system increases the range of sizes and the patterns of changes in sizes.

In accordance with the above objects, a character generator is provided in which the size of the characters is controlled by the frequency of a blocking oscillator. The frequency of the blocking oscillator is controlled, in turn, by the magnitude of current applied to a timing capacitor in the blocking oscillator. A system for controlling the line length of line segments that are to be displayed by a 'the character generator.

character generator by controlling the repetition rate of a blocking oscillator is described more fully in the patent application to Gilbert Yanishevsky, Ser. No. 365,276,

filed May 6, 1964, entitled, Frequency Control.

To increase the size of a character stored in the character genertaor so as to provide an alerting mechanism or for any other reason, another source of current is electrically connected to the same timing capacitor of the blocking oscillator. This source of current may be generated by any function generator desired. The function generator may be turned on and the current supplied to a current adder by an alerting bit from the computer of The character being displayed then varies according to the manner in which the function generator generates current. In this way variations in the form of a ramp or a step increase may be provided.

The invention and the above-noted and other features thereof will be better and more fully understood from the following detailed description considered with reference to the accompanying drawings in which:

, FIGURE 1 is a block diagram of a computer-display combination which may include an embodiment of the invention;

FIGURE 2 is a schematic circuit diagram of a matrix memory which may be used in an embodiment of the invention;

FIGURE 3 is a block diagram illustrating the connection of an embodiment of the invention in a character I generator;

FIGURE 4 is a schematic circuit diagram of a line segment length control according to an embodiment of the invention;

FIGURE 5 is a block diagram of a size control circuit according to an embodiment of the invention;

FIGURE 6 is a block diagram of a modified size control circuit according to the invention.

In FIGURE 1 a block diagram of a computer-display system that may include an embodiment of the invention is shown having a computer or keyboard device which selects the character to be displayed on the CRT 102. The computer 100 sends digital information to the buffer memory 103, which stores such information as type of character, location of character, and size of character. A conventional drum or magnetic core memory may be used for the buffer memory 103. This memory merely keeps sending the same information to the character generator over and over until new information is to be displayed. In practice the entire display is reproduced many times a second to eliminate visible flicker. The buffer memory 103 is electrically connected to the Patented Mar. 28, 1967 character generator 104, to the course X axis digital-toanalog converter (course D/A-X) 106 and to the course Y axis digital-to-analog converter (D/A-Y) 108.

The course D/A-X 106 is electrically connected to the course horizontal deflection plate 110, or coil in magnetically deflected systems, or the CRT 102 through the course deflection amplifier 112 and the course D/A-Y 108 is electrically connected to the vertical course deflection plate 114, or coil in magnetically deflected systems, through the course deflection amplifier 116.

The information that determines character location is sent from the bufler memory 103 to the two course D/A converters 106 and 108 of the course deflection system. The course D/A-Y 108 determines the general vertical position (or line) upon which a character is to be displayed, while the D/A-X converter determines the general horizontal area (or place on the line) Where a character is to be displayed.

The character generator 104 is electrically connected to the intensity amplifier 118, to the X fine-deflection amplifier 120 and to the Y fine-deflection amplifier 122. The intensity amplifier 118 is electrically connected to the electron gun 124; the X fine-deflection amplifier 120 is electrically connected to the fine horizontal deflection plate or coil 126 of the cathode ray tube 102; and the Y fine-deflection amplifier 122 is electrically connected to the vertical fine-deflection plate or coil 128.

The buffer memory 103 sends the character selection information to the character generator 104. The character generator 104 sends analog information to the deflection amplifiers 120 and 122 to indicate the angle of the line segments that are to form the selected character. They cause the electron beam in the CRT 102 to trace straight lines across the face having the polar angle of the line segments which together compose the selected character. The character generator sends intensity information from a timing circuit through the intensity amplifier 118 to the electron gun 124. The character generator also determines the tracing time or the limits of the lines which together compose the selected character. This tracing time controls the size and configuration of the character. The ratio of the distance of the vertical deflection to the distance of the horizontal deflection of a given stroke determines the slope of the line to be displayed.

In FIGURE 2, a schematic circuit diagram of a memory matrix containing the information necessary for one character is shown having a selection terminal 200, six line selection terminal-s 202A-202F, sixteen angle deflection output terminals 204A-204P, three timing signal output terminals 208A-208C, a blanking signal output terminal 210, and an end-of-character output terminal 212.

Each of the six line-selection terminals 202A-202F are electrically connected to a corresponding one of the emitters of the six NPN transistors 214A-214F. Each of the bases of the transistors 214A-214F is electrically connected to the selection terminal 200 through a different one of six base resistors. Each of the collectors of the six transistors 214A-214F is electrically connected to corresponding ones of the six line or column conductors 216A-216F.

Information is stored in the matrix shown in FIGURE 2 by electrically connecting diodes at selected locations having their cathodes connected to a selected one of the line conductors 216A-216F and their anodes connected to a selected one of the output terminals. The character matrix is selected for readout by applying a voltage to the terminal 200. This permits the transistors 214A-214F to act as closed switches. The line selection terminals 202A-202F are electrically connected to a pulse distributor from which they receive voltage pulses in sequence so as to progressively energize line conductors 216A-216F one at a time.

Each time one of the line conductors 216A-216F is energized, information is read out to the display, which information is suflicient to generate one line of the desired character stored in the matrix of FIGURE 2. It is understood that there is a separate matrix for each symbol and that a transistor, magnetic core, or other type of matrix may be used. The slope of this line is determined by the choice of angle deflection output terminals 204A- 204P that are programmed through a connecting diode. Each of these output terminals represents an angular increment in the slope of the line.

The length of the line is controlled by the diode connection between the line conductors and the timing output terminals 208A-208C. These terminals determine the period of time that the CRT beam traces across the display surface. The terminal 210 provides a blanking voltage to a blanking amplifier to prevent display of the retrace sweeps of the electron beam of the CRT. The terminal 212 provides an end-of-character signal to the computer or keyboard which may then cause the character to be retraced a number of times or select another character for display if the display contains a number of symbols.

The operation of this matrix and the character generator with which it is used is disclosed more fully and completely in the above-identified patent application, Ser. No. 277,796, to Charles P. Halsted. The remainder of this discussion will be concerned primarily with the outputs from the timing terminals 208A208C which determine the length of the lines that are read out of the character matrix. In an embodiment of this invention, the outputs from these three lines are supplemented in such way as to change the size of the character which is to be displayed. This change in size takes place under the control of either the computer or under the control of an operator.

In FIGURE 3 a block diagram is shown illustrating the manner in which an embodiment of the invention is interconnected with a display computer unit. A computer 300 selects a character memory matrix for display on the CRT (not shown) by applying a voltage pulse to one line 302 of the 128 lines corresponding to 128 different characters, which remaining unselected lines are indicated by the line 304. The line 302 is electrically connected to a 24-bit shift register 306 and the selection terminal indicated as 200 in FIGURE 2. The voltage pulse applied by the computer to this line preconditions the shift register so that it steps from character line to character line under the control of the drawing time control 308 which is electrically connected to the shift register 306. Of course, the six input terminals 202A- 202F shown in FIGURE 2 are illustrative of the 24 terminals necessary in the shift register 306 to trace a complex symbol.

The shift register 306 is electrically connected to the character matrix 310, which is that portion of the memory matrix shown in FIGURE 2 having output terminals 204A-204P. The outputs from this matrix are electri cally connected to the X ramp generators 312 and to the Y ramp generators 314 through a gating circuit. The ramp generators 312 and 314 generate the X Y deflection voltages for the cathode ray tube each time the shift register 306 steps to a new line of the character matrix 310. The output terminals 316 and 318 of the ramp generators 312 and 314 respectively provide the deflection voltages that determine the slope of each line, which lines together compose the character stored in the memory matrix. The drawing time control 308 discharges the ramp generators 312 and 314 between characters.

The timing matrix 320, which includes the output terminals 208A-208C, shown in FIGURE 2, is electrically connected to the shift register 306 through the twentyfour column conductors. The timing matrix provides output signals through three lines 322 to the drawing time control 308 to determine the length of each line. This 3-bit code is provided each time the shift register 306 steps to a new line. In response to this code, the drawing time control 308 controls the period of time between the start of successive lines generated by the character generator. Since the character generator draws each line at a constant velocity, the time elapsing between the start and the end of a line determines its length. The clock pulse generator in the drawing time control 308 generates pulses for shifting the shift register 306 in response to the input from the timing matrix 320 to control the drawing time of each line. An additional control on the pulse generating circuit in 308 may add an increment of time to the pulses so as to control the overall size of the entire character.

A blanking matrix 324, which includes the output terminal 210 shown in FIGURE 2, and an end-of-character matrix 326, which includes the output terminal 212 in FIGURE 2, are also electrically connected to the shift register 306 by virtue of the twenty-four column conductors. The blanking matrix 324 suppresses the retrace of the CRT and the end-of-character matrix 326 provides a signal to the computer indicating that one character has been drawn. In response to this signal the computer may take its next action, such as to display another character.

In FIGURE 4 a simplified schematic circuit diagram of a drawing time control is shown having a size control circuit 400, a decoder indicated generally as 402, a current generally as 404, a current adder 406, and a blocking oscillator indicated generally as 408. The decoder 402 and the current generator 404 together act as a digital size control unit. They provide a current to the adder 406, which may be merely a circuit connection to the blocking oscillator through which the current from the current generator 404 and the size control circuit 400 passes to the timing capacitor of the blocking oscillator. The current from the current generator 404 is directly proportional to the weigh of a 3-bit digital word, applied to the decoder from the timing matrix shown in FIGURE 3. This current controls the frequency or repetition rate of the blocking oscillator 400 which in turn controls the shifting of the 24-bit shift register 306 shown in FIGURE 3 to provide the proper length line segments which make up each character. The size control circuit 400 is capable of changing the size of each of the line segments making up the character to increase or decrease this character in size and at a desired analog rate whenever desired, by providing a controlled current to the blocking oscillator.

The decoder section 402 includes eight input terminals 4l0A-410H for receiving .the 2 binary bits, eight input terminals 412A-412H for receiving the 2 binary bits, and eight input terminals 414A-414H for receiving the 2 binary bits. Each ofthe eight input terminals 410A- 410H is electrically connected to the cathode of a different one of the corresponding eight diodes 416A-416H; each of the eight input terminals 412A-412H is electrically connected to the cathode of a different one of the corresponding eight diodes 418A-418H; and, each of the eight input terminals 414A-414H is electrically connected to the cathode of a different one of the corresponding eight diodes420A420H. Each of the eight resistors 422A-422H is electrically connected at one end to a source of a positive'lS volts and is electrically connected at the other end to the anodes of the three input diodes forming together eight AND gates having diodes designated by the suitixes AH and designated by the prefixes 416, 418 and 420.

The decoder circuit 402 includes eight AND gates each having three diodes and three input terminals. These AND gates are adapted to receive each of the possible combinations of the three-bit word provided by the timing matrix 320 shown in FIGURE 3. For each combination of this three-bit word, one AND gate is opened. For any AND gate that is not selected, the output terminal of the output terminals 424A-424H remains close to ground potential. The inputs to the decoder circuit consist of binary ones having a voltage level of a positive 3 volts and binary zeroes having a voltage level near ground. Each possible Word provides a positive three volts to all three of the input terminals on only one of the AND gates, causing the corresponding output terminal of the output terminals 424A-424H to increase to a positive 3 volts.

Each of the eight decoder output terminals 424A424H is electrically connected to the base of a corresponding one of the eight PNP transistors 426A-426H. The emitters of each of the transistors 426A-426H is electrically connected to the emitter of a corresponding one of the eight PNP transistors 428A-428H, and to a source of a positive 15 volts through a corresponding one of the eight potentiometers 430A-430H. Each of the bases of the transistors 428A-428H is electrically connected to a positive source of 1.5 volts; the collectors of each of the transistors 426A-426H are electrically connected to a source of a negative 6 volts. The collectors of each of the eight transistors 428A- 428H are electrically connected to the input terminal of the adder 406.

As pointed out above, the constant current generator 404 contains eight pairs of transistors, each pair of transistors containing one of the suflixes A-H and one of the prefixes 426 or 428. Each of the transistors 428A- 428H is electrically connected to an input of the adder 406 so as to provide current to the blocking oscillator 408. The potentiometers 430A-430H are each individually adjusted so as to provide the proper amount of current to the adder 406 when its corresponding current switch is selected by an output pulse from the decoder 402 on one of the terminals 424A-424H. In each of the unselected current switches the corresponding transistors of the transistors 426A-426H is conducting since its emitter has a slightly positive potential and its base is near ground level. The other transistor of the group 428A- 428H in each of the unselected current switches is cut 011' since its emitter voltage is not positive enough with respect to its base voltage.

However, in the selected current switch, the selected one of the transistors 426A-426H is cut off by the positive 3 volts on the corresponding one of the terminals 424A- 424H, causing the emitter voltage of the other transistor from the group 428A-428H in the selected current switch to rise in a positive direction, driving this transistor into conduction to provide its output current to the adder 406. The amount of current provided to the adder, as mentioned previously, is determined by the magnitude of the resistance and the corresponding one of the potentiometers 430A-430H.

If an alerting bit is applied to terminal 432 of the size control circuit 400, the size control circuit 400 will provide additional current to the adder 406. This current will change the size of the entire character being displayed on the cathode ray tube by controlling the length of each of the line segments making up this character. Consequently, when the character size is to increase, the current provided by the size control circuit 400 will increase at a slower rate than the current provided by the current generator 404. A twenty-to-one ratio is fre quently used. The timing matrix may cause a different one of the current switches in the current generator 404 to be activated for each line of the character, and the size control circuit 400 may add or subtract an amount of current which is substantially constant for one character segment trace to each of these lines so as to result in a character having the same proportions but being larger or smaller than would be the case if no alerting bit had been applied to terminal 432.

The output from the adder 406 is applied to one plate of'the timing capacitor 434 and to the emitter of the PNP transistor 436, both of which are in the blocking oscillator 408. As explained in the aforementioned copending application Ser. No. 365,276 to Gilbert Yanishevsky entitled Frequency Control, the amount of current applied to the timing capacitor 434 from the adder 406 controls the frequency and repetition rate of the output of the blocking oscillator at output terminal 438. The output from terminal 438 steps the 24-bit shift register 306 shown in FIGURE 3 from stage to stage so as to control the line length of the segments forming each charactor. The other plate of the capacitor 434 is electrically connected to one end of the Winding 440 on the blocking oscillator transformer 442. The other end of the winding 440 is electrically connected to a source of a negative 4.5 volts. The collector of the transistor 436 is electrically connected to one end of the other winding 444 of the blocking oscillator transformer 442. The winding 444 is wound in the opposite direction as the winding 440 and is electrically connected at its other end to a source of a negative 15 volts. The base of the transistor 436 is electrically connected to a source of a negative 6 volts.

When the blocking oscillator is energized, the transist-or 436 begins to conduct due to the negative voltage applied to its base and due to the negative voltage applied to the collector. The current flowing through the transistor 436 also flows through the winding 444 of the transformer 442 inducing a voltage of opposite polarity in the winding 440. This voltage causes current to flow through the capacitor 434 charging this capacitor and driving the transistor 436 further into the conduction region. This regenerative process continues rapidly until the transistor 436 is saturated.

When the transistor 446 is saturated, the current from its collector through the transformer winding 444 becomes constant so that no further voltage is induced in the winding 440. A charging potential is now no longer applied across the condenser 434 from the winding 440. This condenser begins to discharge, inducing a voltage in the winding 444 which decreases the collector voltage of the transistor 436. The transistor current begins to decrease and induces a voltage in the winding 440 that causes it to become non-conducting. The transistor 436 remains in its non-conducting state until the capacitor 434 is discharged sufiiciently for its emitter to once again become positive with respect to its base. The current applied to the timing capacitor 434 from the adder 406 varies this cycle and controls the frequency of the blocking oscillator.

In FIGURE a simplified circuit diagram of the size control circuit indicated as 400 in FIGURE 4 is shown having a digital size control circuit 500 including a decoder 402 and the current generator 404 shown in FIGURE 4. The digital size control circuit 500 is electrically connected to the current adder 406. The current adder 406 is electrically connected to the timing capacitor 434 of the block ing oscillator 408 shown in FIGURE 4.

The output of a current switch of one polarity only is indicated generally at 502 for application to the current adder 406. This current switch is similar to those disclosed in the current generator 404 of FIGURE 4. However, it is biased into the Class A mode so as to operate as an analog current switch. Further, an opposite polarity of current may be provided. The current switch 502 includes the two PNP transistors 504 and 506. The transistor 506 has its base electrically connected to the output of the gate 508. The output from the gate 508 steers the current from the voltage source 510 either through the transistor 506 to the source 507 or through the transistor 504 to the current adder 406. The gate 508 is open by an attention bit applied to terminal 512 which sets the flip-flop 514, the set output terminal of which is electrically connected to an input of the gate 508. The flipflop 514 is reset by a voltage pulse applied to terminal 516. The other input to the gate 508 is the output of the function generator 518. This function generator may be a sawtooth wave function generator or any other type of function generator, and the gate passes the analog function to transistor 506. It controls the manner in which the size of the characters displayed on the screen 8 of the CRT are varied when an attention bit is applied to the terminal 512 of the flip-flop 514. Several types of suitable function generators are described in sections 6.6 and 6.8 of Electronic Analog Computers, by Korn and Korn, McGraw-Hill Book Company, New York, New York, 1956. I

It can be seen that the above apparatus provides a convenient method and apparatus for changing the size of characters displayed by a character generator. The indidivual characters which are to be effected by this change in size can be selected by the appropriate pulsing of the flip-flop 514. That is, alternate characters may be changed in size through the mechanism of this invention by alternately pulsing terminals 512 and 516. It is also contemplated that additional function generators may be separately gated into the current switch to cause some symbols to vary in one fashion and others under control of a different function. The rate in which the characters change size is controlled by the function generator 518 so that a rapid change in size or a gradual change in size is possible. This mechanism -is economical and does not require new symbols to be stored. It provides a convenient system for alerting the operator.

Instead of utilizing the digital size control detail in FIGURE 4, the drawing time control may be of the type disclosed in the aforesaid Halsted application Ser. No. 277,796 and as illustrated in FIGURE 6 herein. A timing control 600 is synchronized by a trigger from a comput at terminal 601. Pulse generator 602, in turn, causes a three stage binary counter 603 to advance from a reset condition. Comparator 604 receives each of the three coded bits (as well as their complements) and compares those signals with the corresponding three bits (and their components) generated from the output of the timing matrix 606 which corresponds to that shown in FIGURE 2, for example. The comparator is of a common type and provides an output at line 607 serving as one input to AND gate 608. The AND gate passes a shift output pulse when primed over line 607 and when receiving a pulse from pulse generator 602. The shift pulse advances register 609 to its next line. A reset for the counter is also accomplished over delay 610 from the comparator 604.

In the FIGURE 6 embodiment, the analog function generator 611 is connected to the pulse generator 602 so as to vary the frequency of the pulses whenever the function generator is gated on. This technique enables the desired symbols to have their size controlled in an analog fashion.

Obviously, many modifications and variations of the invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims, the invention may be practiced otherwise than as specifically described.

What is claimed is:

'1. A constant velocity character generator, comprising a cathode ray tube for presenting a display of characters, each of which is composed of a plurality of straight lines, memory means for storing a plurality of characters, each of said characters in said memory means being characterized by a plurality of indicia each indicating the length and polar angle of one of said straight lines composing said character, selection means for selecting one of said characters stored in said memory means and having means included therein for reading out said indicia from said memory means in the form of a series of line indications, each of which includes a first signal indicating the polar angle of the line and a second signal indicating the length of the line, deflection voltage means electrically connected to said means and to said cathode ray tube for generating deflection voltages for said cathode ray tube in response to said first signal, which deflection voltages correspond to said polar angle, timing means electrically connected to said memory means for receiving said second signal indicating line length, said timing means having further means for terminating one line indication of said series of line indications, and also including means for starting. the next line indication of said series, whereby the length of said one line drawn on said cathode ray tube is controlled, and functional signal control means including functional signal generating means and summation means connected thereto for selectively alerting said second signals of said line indications, whereby the size of said characters displayed on said cathode ray tube is altered.

2. A constant velocity character generator in accordance with claim 1 in which said memory means includes a shift register means for causing the successive read out of said line indications in response to input pulses from said timing means.

3. A constant velocity character generator in accordance with claim 2 in which said timing means comprises a blocking oscillator, including a timing capacitor, a shaft register with a shift input means, said input including current summing means and a firs-t current generating means electrically connected to said timing capacitor of said blocking oscillator and also connected to said memory means for providing a first current to said timing capacitor in response to said second signal of said line indications, whereby the frequency of said blocking oscillator will be controlled in response to said second signal of said line indications, and second analog current generator means also connected to said timing capacitor through said current summing means for selectively controlling the current flow to said timing capacitor through the summation of the currents from said first and said second current generating means. I

4. A character generator apparatus comprising a character storage matrix including a plurality of segment portions for storing polar angle and length data for a plurality of straight line segments which together constitute a desired character, a cathode ray tube, distributor means for sequentially select-ing particular individual segment portions of said matrix for reading out said data to said cathode ray tube and for controlling the tracing of succesive segments of said desired character, generator means connected to said distributor means and responsive to a predetermined function signal to provide a first frequency signal for periodically causing said distributor means to advance to a subsequent segment portion of said matrix, an analog function generator with selective control means, an adding means coupled between said analog function generator and said generator means for enabling said analog function generator to selectively control the frequency of said generator means to thereby cause the length of generated line segments and thus the size of a desired character to vary according to said function.

5. A character generator apparatus as defined in claim 4 wherein said generator means includes a blocking oscillator having a capacitor and wherein said analog function generator controls the rate at which said capacitor charges by varying the charging current through said adding means from said analog function generator in accordance with a desired analog function.

6. A character generator apparatus as defined in claim 4 in which there are a cathode ray tube display means and a plurality of storage matrices, wherein selected ones of said matrices are connected in a desired sequence to cause a plurality of symbols to be traced on the face of said cathode ray tube display means and wherein said apparatus further comprises symbol slection means in which certain ones of said symbols only are caused to have their size changed by said function generator during successive presentations of said plurality of symbols upon said tube display.

7. A character generator apparatus as defined in claim '6 further including a capacitive controlled generator means, a function generator means and a signal summing means connected therebetween wherein said function generator is connected to control the current charging rate of the capacitor in said generator means through said signal summing means and wherein said analog function varies slowly with respect to the tracing rate of said plurality of symbols and said character generator includes means to provide physical size variations and thereby provide additional information to a viewer of said display while observing successive symbol tracings without need for additional resolution. 7

8. The combination comprising a display means having a display surface and including means for displaying a plurality of lines on said surface, memory means including a first and a second signal source connected to said display means to provide a first and a second input signal thereto, said first input signal determining the direction of each of said plurality of displayed lines and said second input signal determining the length of each of said plurality of displayed lines, said memory means further including means of applying said first and second input signals in a predetermined sequence to said display means, a selection signal source means connected to said memory means to provide thereto a selection signal capable of activating the sequence applying means included therein, and functional signal modulating control means also connected to said display means for functionally modulating said second input signal applied to said display means to thereby controlla-bly vary said second input signal in accordance with an applied functional signal to said control means.

9. The combination according to claim 8 in which said. display means includes a pulse generator means connected to receive said second input signals for generating timing pulses which determined the length of said plurality of displayed lines, said memory means includes a current generator means connected therein to provide said second input signal for controlling the frequency of said pulse generating means, and said control means includes a second current generator means connected therein to said functional signal control means for controlling the flow of current to said pulse generating means.

10. The combustion according to claim 9 in which said second current generator means connected to said functional signal control means comprises an analog function generator, a gate, the output of said function generator being electrically connected to an input of said gate, said gate having a control terminal whereby a voltage pulse applied to said control terminal enables said gate causing the voltage from said function generator to appear at the output terminal of said gate, and current switch means electrically connected to the output of said gate for providing an output current which varies in proportion to the voltage appearing at the output of said gate, said output of said current switch means being electrically connected to said pulse generating means included in said display means.

11. The combination comprising a display means having a display surface and including means for displaying a plurality of lines on said surface, memory means including a first and a second signal source connected to said display means to provide a first and a second input signal thereto, said first input signal determining the'direction of each of said plurality of displayed lines and said second input signal determining the length of each of said plurality of displayed lines, said memory means further including means for applying said first and second input signals in a predetermined sequence to said display means, a selection signal source means connected to said memory means to provide thereto a selection signal capable of activating the sequence applying means included therein, and a functional signal source with control means including a current summation means also connected to said display means for modulating said second input signal applied to said display means by adding thereto a signal from said functional signal source to thereby controllably vary the length of said plurality of lines dis- 1 i 1 2 played on said surface in accordance with the variations 3,158,858 11/ 1964 Ragen et al. 340-324.1 X of the signal received from said functional signal source. 3,161,866 12/1964 Orenstein et a1. 340-324.1 3,205,488 9/ 1965 Lumpkin 340--324.1

References Cited by the Examiner UNITED STATES PATENTS 2,935,744 5/1960 Foy 340-32'4.1 3,104,387 9/1963 Loshin Q. 340-3241 5 NEIL C. READ, Primary Examiner. A. I. KASPER, Assistant Examiner. 

4. A CHARACTER GENERATOR APPARATUS COMPRISING A CHARACTER STORAGE MATRIX INCLUDING A PLURALITY OF SEGMENT PORTIONS FOR STORING POLAR ANGLE AND LENGTH DATA FOR A PLURALITY OF STRAIGHT LINE SEGMENTS WHICH TOGETHER CONSTITUTE A DESIRED CHARACTER, A CATHODE RAY TUBE, DISTRIBUTOR MEANS FOR SEQUENTIALLY SELECTING PARTICULAR INDIVIDUAL SEGMENT PORTIONS OF SAID MATRIX FOR READING OUT SAID DATA TO SAID CATHODE RAY TUBE AND FOR CONTROLLING THE TRACING OF SUCCESIVE SEGMENTS OF SAID DESIRED CHRACTER, GENERATOR MEANS CONNECTED TO SAID DISTRIBUTOR MEANS AND RESPONSIVE TO A PREDETERMINED FUNCTION SIGNAL TO PROVIDE A FIRST FREQUENCY SIGNAL FOR PERIODICALLY CAUSING SAID DISTRIBUTOR MEANS TO ADVANCE TO A SUBSEQUENT SEGMENT PORTION OF SAID MATRIX, AN ANALOG FUNCTION GENERATOR WITH SELECTIVE CONTROL MEANS, AN ADDING MEANS COUPLED BETWEEN SAID ANALOG FUNCTION GENERATOR AND SAID GENERATOR MEANS FOR ENABLING SAID ANALOG FUNCTION GENERATOR TO SELECTIVELY CONTROL THE FREQUENCY OF SAID GENERATOR MEANS TO THEREBY CAUSE THE LENGTH OF GENERATED LINE SEGMENTS AND THUS THE SIZE OF A DESIRED CHARACTER TO VARY ACCORDING TO SAID FUNCTION. 